There’s a story on Slashdot about a new idea for a way to enable patching complex microprocessors to work around design defects, or “errata”, as they’re called in the industry. The basic concept is to include a small amount of configurable logic on a chip, and use it to detect conditions that would otherwise trigger a known errata, and automatically work around it.
This would allow manufacturers to fix design defects in already-manufactured chips, rather than fixing the defects in subsequent revisions of the chips, and leaving earlier customers with the buggy chips they bought (which is what they do now).
Unfortunately, the article that’s linked in the Slashdot submission is a little light on details, and the summary is just plain misleading, so the Slashdot comments are completely swamped in responses like: “this is an old idea!”, “what’s so novel about an FPGA?”, “FPGA’s are expensive, slow, and inefficient!”, and other nonsense.
I actually read the article and tried to understand what it was about. When I posted that it sounded like a good idea, and it’d be interesting to read more about the design, an unregistered Slashdot user provided me with a link to the original paper, which made it much more clear what the whole thing was about.
But nobody else can see that link, because Slashdot’s moderation system assumes that unregistered users are less trustworthy, so the comment with the link to the original paper is invisible to the idiots that keep ranting back and forth to each other about what a dumb idea this is, without having any idea what they’re talking about.
So, go here, and read the original paper, especially if you’ve ever had the experience of running into one of these errata before. Hopefully, the folks at AMD, Intel, and IBM will see this, and it’ll make it’s way into newer designs.